Posted: January 17, 2018
Samsung released their 64L 3D V-NAND solution in January of 2017 for key IT customers, and ramped up production in June for its expanded general market.
The innovation included the following highlights:
- Vertical NAND cell structure with 71 gates and 20 nm BL Half pitch
- A NAND string configuration likely with 64 word lines, 4 DWLs, 2 string select lines and 1 ground select line
- 9 channel hole integration between common source line including 1 dummy hole
- Laminated layer deposition for charge trap layer and tunnel oxide
- Mask design updated for WL Pad trimming
- Medium Voltage Transistor instead of Low Voltage Transistor on X-dec
There are many reasons this device caught our attention, and we have conducted a great deal of analysis on it. We are offering the reports defined below about the Samsung 64L 3D V-NAND, as well as information available through our various subscription products and tools.
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